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Highlights 2023

 

 

Pick and place

Pick and place

  • Pick and Place for solder paste and component deposition
  • Set of accessories for different types of components arrived in June
  • Goal: Full assembly test on test PCB later this year

 

 

Corso di Verilog

Verilog course

 

  • Verilog course for two fifth graders of the ITI of Faenza (about 8 hours per class) with laboratory activities

 

Microelettronica

Microelettronica

Microelectronics

 

PC with ASIC design software:

  • Cadence (analog and digital chip design): National licenses
  • Synopsys (digital chip design): local license
  • Mentor Graphics QuestaSim (simulator): local license

The technologies we can work with are:

LFoundry

LFoundry

  • 110 nm

TSMC

  • 28 nm
  • 65 nm

UMC

  • 65 nm
  • 110 nm